5.c. 0x82: Get Error Byte

Command 0x82 (130): Get Error Byte

Compact protocol: 0x82
Pololu protocol: 0xAA, device ID, 0x02

The qik maintains an error byte, the bits of which, when set, reflect various errors that have occurred since the byte was last read using this command. If we call the least-significant bit 0, the bits of the error byte are as follows:

• bit 0: Motor 0 Fault
  A hardware-level error signaled by motor M0’s driver to indicate overtemperature or a short-circuit condition on the output.

• bit 1: Motor 1 Fault
  A hardware-level error signaled by motor M1’s driver to indicate overtemperature or a short-circuit condition on the output.

• bit 2: Motor 0 Over Current
  This error bit is set when the motor M0 current exceeds the motor M0 current limit parameter, current limiting is enabled (i.e. the current limit is not zero), and the current limit response parameter is set to zero. If the current limit response parameter is not zero, the qik automatically decreases the average motor voltage to keep the current at the limit, and this error bit is not set.

• bit 3: Motor 1 Over Current
  This error bit is set when the motor M1 current exceeds the motor 1 current limit parameter, current limiting is enabled (i.e. the current limit is not zero), and the current limit response parameter is set to zero. If the current limit response parameter is not zero, the qik automatically decreases the average motor voltage to keep the current at the limit, and this error bit is not set.

• bit 4: Serial Hardware Error
  A hardware-level error that occurs when a byte’s stop bit is not detected at the expected place or when the hardware serial receive buffer is full. The former condition can occur if you are communicating at a baud rate that differs from the qik’s baud rate. The latter condition should not occur during normal operation.

• bit 5: CRC Error
  This error occurs when the qik is running in CRC-enabled mode (i.e. the CRC-enable jumper is in place) and the cyclic redundancy check (CRC) byte at the end of the command packet does not match what the qik has computed as that packet’s CRC. In such a case, the qik ignores the command packet and generates a CRC error. See Section 6 for more information on cyclic redundancy checking.

• bit 6: Format Error
  This error occurs when the qik receives an incorrectly formatted or nonsensical command packet. For example, if the command byte does not match a known command, data bytes are outside of the allowed range for their particular command, or an unfinished command packet is interrupted by another command packet, this bit is set.

• bit 7: Timeout
  It is possible to use a configuration parameter to enable the qik’s serial timeout feature (see Section 5.a). When enabled, the qik sets this bit if the timeout period set by the configuration parameter has elapsed. The timeout timer is reset every time a command packet is received. A timeout error can be used to shutdown the motors in the event that serial communication between the qik and its controller is disrupted.

In response to an error, the qik lights the red status LED and drives the ERR pin high until this command is called. Calling this command clears the error byte, turns the red status LED off, and sets the ERR pin to high-impedance (the error LED pulls it low). The shut-down-on-error configuration parameter can be used to stop motors M0 and M1 as a safety precaution when a serial error occurs, a motor-fault error occurs, or a motor-over-current error occurs. See Section 5.a for more information on this configuration parameter.